This invention relates generally to the field of electronic systems and, in particular, to signal clipping circuits for switched capacitor sigma delta analog-to-digital converters included within audio codec systems.
The codifier/decodifier (CODEC) is the algorithm that handles the coding and decoding of audio signals within an electronic system. Specifically, an audio CODEC is a custom mixed-signal core providing analog-to-digital (A/D) and digital-to-analog (D/A) conversion. A simple serial interface is used to exchange digital data (D/A input and A/D output) between the application specific integrated circuit (ASIC) and CODEC core. Prior art CODEC features delta-sigma AID and D/A oversampled converters and low power dissipation.
A typical uplink channel for a mobile phone voiceband or audio CODEC includes a microphone, amplifier, sigma-delta analog-to-digital converter (ADC) and a digital filter coupled together on one chip. This first chip couples to a digital signal processor for processing the digital signal received. Another chip includes a radio frequency (RF) modulator which is coupled to a last component that includes a RF power amplifier. The signal is transmitted over an antenna to a downlink channel for the mobile phone voiceband CODEC.
Initially, the audio CODEC receives an analog voice signal through the microphone and converts it to a digital signal. The digital signal is forwarded to a digital signal processor for processing. This signal is transmitted to a receiver. In the receiver, the digital signal is processed through the digital signal processor and forwarded to a D/A converter. The analog signal is fed to a speaker.
In most prior art CODECs, the sigma-delta ADC is scaled for a maximum output corresponding to the +3dbm0 code of the pulse code modulation (PCM) data. The analog signal corresponding to this digital upscale value is far less than the maximum allowable dynamic range, which usually is limited by the supply range. This fact could potentially overload the A/D and consequently the digital filter. An FCC test, mandatory in the U.S., falls under this category. Once the digital filter overloads, internal clipping mechanisms prevent wrap around of the digital signal, thus creating a digital representation of a trapezoidal signal that contains harmonics with sufficient power to increase the FM modulation depth.
First and second order sigma delta analog modulators are inherently stable under large input level variations. Higher order modulators, however, can become unstable during the overload condition. Clipping the input signal to a predetermined safe operation level, prevents the modulator from going unstable, without having the need to recover stability after the overloading condition is removed. In other cases, even inherently stable sigma-delta structures have to be protected by a clipping mechanism to prevent post digital filtering from generation of a rail-to-rail digital representation of a quasi-square wave which can over-modulate the RF channel in a typical transmit CODEC channel for wireless applications.
Several implementations have been proposed to solve this problem. Most of them deal with clipping the signal in a previous analog amplifier stage. The solution provided in our copending application includes a multiplexer amplifier having an analog output signal, a sigma-delta ADC having an input coupled to the analog output signal and a clipping circuit coupled to the input of the ADC for clipping the analog output signal. While this analog solution avoids saturation and provides an effective clipping mechanism to prevent wrap around of the digital signal, it is prone to overshoot and settling issues.
In present systems, however, the signal is fed to the A/D directly from external sources, such as a microphone or an RF mixer. Accordingly, many audio CODECs no longer include the microphone and amplifier. Thus, there is a need for a clipping solution incorporated within the design of the sigma-delta ADC that is free of overshoot and settling issues.
A mixed signal CODEC including an improved sigma-delta ADC limits input signals into a switched capacitor configuration and avoids adding circuit overhead in the signal path. Additionally, it avoids overshoot and settling problems. This improved sigma-delta ADC, having an input signal and an output signal, includes a switch, a clipping circuit, and a sigma-delta ADC. It solves the clipping signal problem by limiting the signal right at the input of the sigma-delta ADC. The clipping circuit couples to the switch and the sigma-delta ADC for switching the voltage applied to the sigma-delta ADC between the input signal and at least one threshold voltage. When the input signal goes above a prescribed upper threshold, the fixed threshold voltage is applied to the sigma-delta ADC, which converts fixed threshold voltage into a digital signal. Moreover, when the input signal goes below that prescribed threshold, the incoming signal is applied to the sigma-delta ADC, which converts the incoming signal. In the alternative, when the input signal goes below a prescribed lower threshold, the fixed threshold voltage is applied to the sigma-delta ADC, which converts fixed threshold voltage. Furthermore, when the input signal goes above that prescribed threshold, the incoming signal is applied to the sigma-delta ADC, which converts the incoming signal. Given this solution, minimum power and area overhead exist.